Pengju Liu

I'm a Ph.D. student in Computer Science at the University of Minnesota Twin Cities, where I'm advised by Caiwen Ding. I work on AI agents for electronic design automation (EDA).

Previously, I received my Master's degree from the Department of Electronic and Computer Engineering at the Hong Kong University of Science and Technology, where I was advised by Wei Zhang, and my Bachelor's degree in Microelectronics from the University of Electronic Science and Technology of China. Before my Ph.D., I was a research assistant at Shanghai Jiao Tong University with Zhezhi He, working on LLMs for Verilog code generation.

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News

• 2026: Received the DAC Young Fellowship.

Research

I'm interested in AI agents for electronic design automation (EDA), self-improving agents, and world models and predictive representation learning (e.g., JEPA). Most of my research so far applies LLMs and LLM agents to chip design, from Verilog code generation to design rule checking (DRC) repair and power, performance, and area (PPA) optimization. * denotes equal contribution.

A hierarchical benchmark of 145 tasks for evaluating LLM agents on design rule checking (DRC) repair and power, performance, and area (PPA) optimization. Evaluating eight LLMs across agent frameworks shows that geometric reasoning and PPA trade-offs are the key challenges, and that adding vision improves DRC repair.

Multi-agent algorithms that reason over layout geometry to automatically correct design rule checking (DRC) violations.

A framework that mitigates symbolic, knowledge, and logical hallucinations in LLM-generated Verilog through chain-of-thought reasoning and targeted data augmentation, aligning the generated code with HDL engineering practice and improving functional correctness on VerilogEval and RTLLM.

Miscellanea

Website template from Jon Barron.